1. Field of the Invention
The present invention relates to a threshold modulation type solid-state imaging device for use in video cameras, digital cameras, scanners, camera-equipped mobile phones, or the like, and to a method of manufacturing such solid-state imaging device.
2. Description of Related Art
Solid-state imaging devices of charged coupled device (CCD) type and metal oxide silicon (MOS) type have been widely used in most image input devices due to excellent mass productivity using advanced fine patterning techniques. Especially, the MOS type solid-state imaging devices have gained a great deal of attention because of the advantages that MOS type solid-state imaging devices have lower power consumption than the CCD type, and that they can be easily incorporated in peripheral circuit therefor by use of common complementary MOS (CMOS) fabrication technique.
On account of these advantages, MOS type solid-state imaging devices have been improved. For example, U.S. Pat. No. 6,504,194 (counterpart of Japan Patent No. 3315962) describes the MOS type solid-state imaging device in which a carrier pocket (hole pocket) is formed below the channel region of the MOS type transistor to accumulate photo-generated charges (holes) transferred from a charge generating region. This solid-state imaging device, as shown in FIG. 26, comprises plural pixels each of which is provided with a photo-diode 110a and a MOS type transistor 110b as a photo-detector. On an n-type (one conductive type) well layer 112 in each pixel, p-type (opposite conductive type) well layers 115a, 115n are formed. In the photo-diode 110a side, an n-type impurity layer 117b is provided on the surface region of the p-type well layer 115a so as to form an embedded structure to photo-generated charges in the photo-diode 110a. In the MOS transistor 110b side, a ring-shaped gate electrode 119 is formed on the p-type well layer 115b via an insulation layer 118. An n-type source region 116a formed on the p-type well layer 115b is surrounded by the ring-shaped gate electrode 119. On the other hand, an n-type drain region 117a is formed on the surface region of the p-type well layer 115b outside the gate electrode 119. The drain region 117a is extended laterally so that the drain region 117a is integrated with the impurity layer 117b in the photo-diode 110a. 
Below the gate electrode 119 is formed an n-type channel dope layer 115c. High density p-type impurities are implanted (introduced) in the well layer 115b below the channel dope layer 115c, so that a hole pocket 125 is formed in the vicinity of the source region 116a. Photo-generated holes generated by light irradiation in the photo-diode 110a is accumulated in the hole pocket 125. The threshold voltage (corresponding to the source potential) of the MOS type transistor 110b depends on the amount of photo-generated charges accumulated in the hole pocket 125. Thus, it is possible to obtain image signals by detecting the source potential that is changed in accordance with the threshold voltage.
Recently, because of strong demand for miniaturization and improvement in image quality of the MOS type imaging device, it is necessary to miniaturize the pixel size and to accumulate the pixels. Suppose that the pixel size of 4.2 μm is miniaturized to 3.0 μm, the width of the gate electrode of 1.35 μm needs to be 0.5 μm. Smaller gate width makes it difficult to form resist masks having openings corresponding to the carrier pockets. It is also difficult to align the resist masks to the gate electrodes precisely. In the event of forming the carrier pocket by implanting the impurity ions through the opening formed in the resist mask, the position of the carrier pocket is varied from the designed position. Such variation in the position of the carrier pocket changes the threshold voltage caused by the accumulated charges, so the noise in output image signal will increase.